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学者姓名：李景虎
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Abstract ：
The combination of electroencephalography (EEG) signals with peripheral physiological signals (PPS) for emotion recognition has garnered increasing attention due to their objectivity and rich information content. However, the heterogeneity and correlations of multimodal physiological signals remain significant challenges in multimodal emotion recognition. In addition, effectively extracting spatiotemporal features from these physiological signals is crucial for accurate emotion recognition. To address these issues, we propose a multimodal emotion recognition framework based on intra-and inter-modal supervised contrastive learning (IAECL), using EEG and PPS signals as inputs. Specifically, IAECL employs modality-specific encoders to mitigate heterogeneity. In addition, a dual-level supervised contrastive learning strategy is introduced: intra-modal contrastive learning enhances the feature compactness within each modality, and inter-modal contrastive learning strengthens cross-modal correlations. To better extract complex spatiotemporal features from EEG, we further a novel EEG encoder that integrates graph-based modeling, spatial-temporal convolution, and multi-head attention. This design effectively captures inter-channel dependencies and enhances local-global feature interactions to improve EEG feature representation. Extensive experiments on the publicly available DEAP and DREAMER datasets demonstrated the superior performance of IAECL, which achieved state-of-the-art results in both within-subject and mixed-subject emotion classification tasks. Visualization analyses further revealed that IAECL effectively aligns multimodal features to enhance inter-modal correlations, offering a novel solution to the challenges of multi-modal emotion recognition. We also analyzed the optimal combination of other physiological signals (e.g., electromyography or temperature recording signals) with EEG for multimodal emotion recognition.
Keyword ：
EEG EEG Emotion recognition Emotion recognition Multimodal physiological signal Multimodal physiological signal Spatiotemporal features Spatiotemporal features Supervised contrastive learning Supervised contrastive learning
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| GB/T 7714 | Zhao, Rongyue , Ma, Tianyuan , Li, Wangsen et al. EEG-based multimodal emotion recognition framework with supervised contrastive learning and spatial-temporal convolutional attention network [J]. | DIGITAL SIGNAL PROCESSING , 2026 , 168 . |
| MLA | Zhao, Rongyue et al. "EEG-based multimodal emotion recognition framework with supervised contrastive learning and spatial-temporal convolutional attention network" . | DIGITAL SIGNAL PROCESSING 168 (2026) . |
| APA | Zhao, Rongyue , Ma, Tianyuan , Li, Wangsen , Li, Yihua , Li, Jinghu , Huang, Dong et al. EEG-based multimodal emotion recognition framework with supervised contrastive learning and spatial-temporal convolutional attention network . | DIGITAL SIGNAL PROCESSING , 2026 , 168 . |
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This paper presents a low-power low-dropout regulator integrated with a bandgap reference (LDO-BGR) system that achieves exceptional low-frequency power-supply rejection (PSR). The proposed architecture employs three novel feedback loops, enabling functional reuse of a single error amplifier for both the shared-feedback-loop BGR (SF-BGR) and the LDO. This shared-loop approach enhances PSR while maintaining voltage headroom. A dynamic response technique combined with power gating improves load-transient performance without increasing the quiescent current. The capacitor-less LDO operates from a 2.5 V supply while regulating the output to 2.2 V, demonstrating a room-temperature quiescent current of 370 nA and supporting a maximum load current of 50 mA. Post layout simulations show worst-case PSR of-101 dB at 1 Hz and-47.8 dB at 1 kHz across the specified load range, with a transient figure-of-merit (FoM1) of 0.219 mV.
Keyword ：
Dynamic response technique Dynamic response technique LDO-BGR system LDO-BGR system PSR PSR Shared feedback loop BGR (SF-BGR) Shared feedback loop BGR (SF-BGR)
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| GB/T 7714 | Xie, Jin , Chen, Qibin , Li, Jinghu et al. A 370-nA capacitor-less LDO-BGR system for PSR enhancement via shared feedback loops [J]. | MICROELECTRONICS JOURNAL , 2026 , 167 . |
| MLA | Xie, Jin et al. "A 370-nA capacitor-less LDO-BGR system for PSR enhancement via shared feedback loops" . | MICROELECTRONICS JOURNAL 167 (2026) . |
| APA | Xie, Jin , Chen, Qibin , Li, Jinghu , Pan, Xingxing , Luo, Zhicong , Zhang, Jianwei . A 370-nA capacitor-less LDO-BGR system for PSR enhancement via shared feedback loops . | MICROELECTRONICS JOURNAL , 2026 , 167 . |
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Addressing the challenges of variable target morphology, small critical regions, and complex background interference in eggplant picking point detection within complex agricultural scenarios, this study proposes MDAD-YOLO (Multi-dimensional Attention and DySample YOLO), a detection model improved based on the YOLOv10n-pose framework. First, the model's cross-dimensional perception ability for fruits and picking points is enhanced by integrating the collaborative mechanism of regional receptive field attention with channel-space joint attention. Next, within the Neck structure, coordinate attention is incorporated to optimize the spatial localization accuracy of fine-grained features, enhancing sensitivity to minute regions such as the fruit stem apex. Additionally, dynamic pixel reorganization is applied to enhance feature map reconstruction details, addressing the detail loss caused by traditional interpolation methods. Finally, cascading adaptive fine-grained channel attention with position-sensitive attention enables multi-level modeling of channel dependencies and collaborative spatial context enhancement. Through a seven-tier validation framework, the model's effectiveness, robustness, and generalizability have been comprehensively demonstrated. Experimental results show that the model achieves 93.6% mAP@50 for object detection, 94.7% mAP@50 and 92.1% mAP for keypoints detection, and an average pixel Euclidean distance error of 19.41 on the self-built eggplant dataset, outperforming YOLOv12 and other high-performance models. Additionally, cross-crop experiments on the pepper dataset showed a 2.1% and 2.7% improvement in mAP for object and picking point detection, respectively, compared to the baseline model, confirming its cross-crop robustness. This study reveals the synergistic enhancement of dynamic upsampling and attention mechanisms in agricultural object detection, providing new insights for lightweight model design in complex scenarios.
Keyword ：
Dynamic upsampling Dynamic upsampling MDAD-YOLO MDAD-YOLO Multi-dimensional attention mechanism Multi-dimensional attention mechanism Object detection Object detection Picking point detection Picking point detection
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| GB/T 7714 | Huang, Yikun , Li, Gang , Li, Jinghu et al. Accurate localization of fruit targets and picking points with multi-dimensional attention and dynamic upsampling [J]. | COMPUTERS AND ELECTRONICS IN AGRICULTURE , 2026 , 240 . |
| MLA | Huang, Yikun et al. "Accurate localization of fruit targets and picking points with multi-dimensional attention and dynamic upsampling" . | COMPUTERS AND ELECTRONICS IN AGRICULTURE 240 (2026) . |
| APA | Huang, Yikun , Li, Gang , Li, Jinghu , Chen, Hao , Lin, Hefei , Yang, Changcai et al. Accurate localization of fruit targets and picking points with multi-dimensional attention and dynamic upsampling . | COMPUTERS AND ELECTRONICS IN AGRICULTURE , 2026 , 240 . |
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A low-area and low-temperature-coefficient (TC) bandgap reference (BGR) circuit using curvature compensation technology is presented. Comparing with traditional BGR with multiple BJT, four MOSFETs biased in their weak-inversion regions can produce a proportionalto-absolute-temperature (PTAT) voltage without consuming a great active area. In addition, a curvature compensation circuit was adopted to reduce the drift of temperature. The proposed BGR circuit has been implemented using a 0.18um technology, occupying an area of 0.01 mm2.Simulation results demonstrate that the BGR achieves average TC of 7.86ppm/degrees C from -40 degrees C to 125 degrees C at 3.3 V and the line regulation (LR) of 0.048%/V between 2.7 and 3.6 V supply voltage, respectively.
Keyword ：
and bandgap reference voltage and bandgap reference voltage curvature compensation curvature compensation low-area low-area Sub-threshold Sub-threshold
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| GB/T 7714 | Yan, Zhenjie , Zhang, Binhan , Yang, Rui et al. A 1.2-V compact Bandgap Reference with Curvature Compensation technology [J]. | IEICE ELECTRONICS EXPRESS , 2025 , 22 (7) . |
| MLA | Yan, Zhenjie et al. "A 1.2-V compact Bandgap Reference with Curvature Compensation technology" . | IEICE ELECTRONICS EXPRESS 22 . 7 (2025) . |
| APA | Yan, Zhenjie , Zhang, Binhan , Yang, Rui , Zheng, Yi , Li, Jinghu , Luo, Zhicong et al. A 1.2-V compact Bandgap Reference with Curvature Compensation technology . | IEICE ELECTRONICS EXPRESS , 2025 , 22 (7) . |
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The stable operation of micromachine systems relies on reliable power management, where DC-DC converters provide energy with high efficiency to extend operational endurance. However, these converters also constitute significant electromagnetic interference (EMI) sources that may interfere with the normal functioning of micro-electromechanical systems. This paper proposes a boost converter utilizing Pulse Width Modulation (PWM) with peak current mode control to address the EMI issues inherent in the switching operation of DC-DC converters. The converter incorporates a Hybrid Spread Spectrum (HSS) technique to effectively mitigate EMI noise. The HSS combines a 1.2 MHz pseudo-random spread spectrum with a 9.4 kHz triangular periodic spread spectrum. At a standard switching frequency of 2 MHz, the spread spectrum range is set to +/- 7.8%. Simulations conducted using a 0.5 mu m Bipolar Complementary Metal-Oxide-Semiconductor Double-diffused Metal-Oxide-Semiconductor (BCD) process demonstrate that the HSS technique reduces EMI around the switching frequency by 12.29 dB mu V, while the converter's efficiency decreases by less than 1%.
Keyword ：
boost converter boost converter integrated circuit integrated circuit pulse width modulation pulse width modulation spread spectrum spread spectrum
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| GB/T 7714 | Zhong, Xing , Yu, Jianhai , Shen, Yongkang et al. A Peak Current Mode Boost DC-DC Converter with Hybrid Spread Spectrum [J]. | MICROMACHINES , 2025 , 16 (8) . |
| MLA | Zhong, Xing et al. "A Peak Current Mode Boost DC-DC Converter with Hybrid Spread Spectrum" . | MICROMACHINES 16 . 8 (2025) . |
| APA | Zhong, Xing , Yu, Jianhai , Shen, Yongkang , Li, Jinghu . A Peak Current Mode Boost DC-DC Converter with Hybrid Spread Spectrum . | MICROMACHINES , 2025 , 16 (8) . |
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This paper presents an adjustable CMOS voltage reference that achieves a low temperature coefficient (TC) through a novel curvaturecompensation technique. The design employs thin/thick-gate NMOS and PMOS pairs to generate complementary voltages (Delta VGs and Delta VsG) with opposing second-order curvature. Dynamically scaling Delta VGs via a programmable k-coefficient and summing with Delta VsG enables output adjustability and low TC. Implemented in 180 nm CMOS, post-layout simulations show 0.5-0.95 V output range with average TC of 5 ppm/degrees C (best) to 15 ppm/degrees C (worst) from-40 degrees C to 125 degrees C. The circuit consumes 456.5 nA at 27 degrees C and achieves-51 dB PSRR (@100 Hz).
Keyword ：
CMOS voltage reference CMOS voltage reference curvature compensation curvature compensation low temperature coefficient low temperature coefficient Sub-threshold Sub-threshold
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| GB/T 7714 | He, Lili , Zhong, Chengjian , Qiu, Hangfang et al. A Novel Curvature-Compensated Adjustable Output CMOS Voltage Reference [J]. | IEICE ELECTRONICS EXPRESS , 2025 , 22 (18) . |
| MLA | He, Lili et al. "A Novel Curvature-Compensated Adjustable Output CMOS Voltage Reference" . | IEICE ELECTRONICS EXPRESS 22 . 18 (2025) . |
| APA | He, Lili , Zhong, Chengjian , Qiu, Hangfang , Zheng, Baiqi , Li, Jinghu , Luo, Zhicong . A Novel Curvature-Compensated Adjustable Output CMOS Voltage Reference . | IEICE ELECTRONICS EXPRESS , 2025 , 22 (18) . |
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Abstract ：
This paper presents a low-power low-dropout regulator integrated with a bandgap reference (LDO-BGR) system that achieves exceptional low-frequency power-supply rejection (PSR). The proposed architecture employs three novel feedback loops, enabling functional reuse of a single error amplifier for both the shared-feedback-loop BGR (SF-BGR) and the LDO. This shared-loop approach enhances PSR while maintaining voltage headroom. A dynamic response technique combined with power gating improves load-transient performance without increasing the quiescent current. The capacitor-less LDO operates from a 2.5~V supply while regulating the output to 2.2~V, demonstrating a room-temperature quiescent current of 370~nA and supporting a maximum load current of 50~mA. Measurements show worst-case PSR of $-101$~dB at 1~Hz and $-48$~dB at 1~kHz across the specified load range, with a transient figure-of-merit (FoM) of 0.219~mV. © 2025, The Authors. All rights reserved.
Keyword ：
Dynamic response Dynamic response Dynamics Dynamics Feedback Feedback Power quality Power quality Transients Transients Voltage regulators Voltage regulators
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| GB/T 7714 | Xie, Jin , Chen, Qibin , Li, Jinghu et al. A 370‑nA Capacitor-less LDO–BGR System for PSR Enhancement via Shared Feedback Loops [J]. | SSRN , 2025 . |
| MLA | Xie, Jin et al. "A 370‑nA Capacitor-less LDO–BGR System for PSR Enhancement via Shared Feedback Loops" . | SSRN (2025) . |
| APA | Xie, Jin , Chen, Qibin , Li, Jinghu , Pan, Xingxing , Luo, Zhicong , Zhang, Jianwei . A 370‑nA Capacitor-less LDO–BGR System for PSR Enhancement via Shared Feedback Loops . | SSRN , 2025 . |
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This paper presents a high precision bandgap voltage reference based on chopping technique, with an output voltage of 1.2 V. To reduce the temperature coefficient (TC), a temperature piecewise compensation circuit is introduced into the traditional bandgap reference circuit, achieving a minimum TC of 0.855 ppm/degrees C over a temperature range of-40 degrees C to 125 degrees C. The chopping technique significantly reduces output noise, resulting in a 1/f noise of 6.11 mu Vrms from 0.1 Hz to 10 Hz. Additionally, a digital trimming technology is employed to address TC deviations caused by process corners and mismatches. Simulation results indicate that the output voltage remains within a +/- 0.085% inaccuracy in 3. The quiescent current is 42 mu A, the power supply rejection ratio (PSRR) reaches 83 dB at 100 Hz, and the line regulation(LR) is 81 mu V/V, with a layout area of 0.02 mm2. This design enhances the precision of the voltage reference while maintaining low TC and low noise characteristics, making it suitable for high-demand analog circuit applications.
Keyword ：
High precision High precision Low noise Low noise Low temperature coefficient Low temperature coefficient Voltage reference Voltage reference
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| GB/T 7714 | Lin, Quanxin , Ye, Dapeng , Chao, Jianshu et al. A 1.2-V 0.855-ppm/°C6.11μVrms noise and high precision bandgap reference based on chopping technique [J]. | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS , 2025 , 200 . |
| MLA | Lin, Quanxin et al. "A 1.2-V 0.855-ppm/°C6.11μVrms noise and high precision bandgap reference based on chopping technique" . | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS 200 (2025) . |
| APA | Lin, Quanxin , Ye, Dapeng , Chao, Jianshu , Li, Jinghu , Luo, Zhicong . A 1.2-V 0.855-ppm/°C6.11μVrms noise and high precision bandgap reference based on chopping technique . | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS , 2025 , 200 . |
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In this paper, we present a novel enhanced recycling folded cascode (ERFC) operational transconductance amplifier (OTA), which exhibits high efficiency and a fast transient response under weak inversion. Our innovative combination of adaptive biasing with nested local feedback (ABNLF) effectively enhances the input transconductance and slew rate (SR), thus improving the transient response. By incorporating coupling capacitors at the output stage, we achieve a stable operating region with large signal responses. Both the traditional RFC OTA and the proposed ERFC OTA were designed in a 0.18 mu m CMOS process, operating at a power supply of 1.8 V, with quiescent currents of 8 mu A and 10.4 mu A, respectively. Post-layout simulations reveal a remarkable enhancement in the proposed ERFC OTA over the traditional RFC OTA, with the SR and gain-bandwidth (GBW) surging by 120- and 5.95-fold, respectively. This advancement boosts the efficiency of the traditional RFC OTA and provides an impressive figure of merit (FoM) of 130.04 (V/mu s)pF/mu A.
Keyword ：
adaptive biasing adaptive biasing enhanced recycling folded cascode (ERFC) enhanced recycling folded cascode (ERFC) high efficiency high efficiency nested local feedback technique nested local feedback technique transient response transient response
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| GB/T 7714 | Wu, Chunkai , Cai, Peng , Li, Jinghu et al. Power-Efficient Recycling Folded Cascode Operational Transconductance Amplifier Based on Nested Local Feedback and Adaptive Biasing [J]. | SENSORS , 2025 , 25 (8) . |
| MLA | Wu, Chunkai et al. "Power-Efficient Recycling Folded Cascode Operational Transconductance Amplifier Based on Nested Local Feedback and Adaptive Biasing" . | SENSORS 25 . 8 (2025) . |
| APA | Wu, Chunkai , Cai, Peng , Li, Jinghu , Xie, Jin , Luo, Zhicong . Power-Efficient Recycling Folded Cascode Operational Transconductance Amplifier Based on Nested Local Feedback and Adaptive Biasing . | SENSORS , 2025 , 25 (8) . |
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This paper presents a CMOS voltage reference circuit designed to achieve high power supply rejection ratio (PSRR) across a wide frequency range while maintaining a low temperature coefficient (TC). The circuit uses voltage self-regulating technology to mitigate the impact of power supply ripple on the output voltage. Additionally, a compact MOSFET-based low-pass filter is integrated into the output stage to further enhance high-frequency PSRR performance. The temperature coefficient (TC) of the reference voltage is optimized using an improved design of stacked diode-connected MOS transistors (SDMTs) with different current biasing. The circuit was designed using a 65-nm process. Post-simulation results indicate that the reference voltage output is 415 mV, with an average TC of 10.42 ppm/degrees C across a temperature range of-40 degrees C to 125 degrees C. Within the supply voltage range of 0.8-1.32 V, the line sensitivity (LS) of the reference voltage is about 0.104 mV/V. It is worth highlighting that the PSRR reaches-128.95 dB at 10 kHz and maintains-63.05 dB at 50 MHz.
Keyword ：
CMOS voltage reference CMOS voltage reference Filter Filter High PSRR High PSRR Low temperature coefficient Low temperature coefficient Subthreshold Subthreshold
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| GB/T 7714 | Zheng, Baiqi , Chen, Qibin , Qiu, Hangfang et al. A 10.42 ppm/°C CMOS voltage reference with high PSRR [J]. | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS , 2025 , 198 . |
| MLA | Zheng, Baiqi et al. "A 10.42 ppm/°C CMOS voltage reference with high PSRR" . | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS 198 (2025) . |
| APA | Zheng, Baiqi , Chen, Qibin , Qiu, Hangfang , He, Lili , Li, Jinghu , Luo, Zhicong . A 10.42 ppm/°C CMOS voltage reference with high PSRR . | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS , 2025 , 198 . |
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