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学者姓名：罗志聪
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Abstract ：
This paper presents a low-power low-dropout regulator integrated with a bandgap reference (LDO-BGR) system that achieves exceptional low-frequency power-supply rejection (PSR). The proposed architecture employs three novel feedback loops, enabling functional reuse of a single error amplifier for both the shared-feedback-loop BGR (SF-BGR) and the LDO. This shared-loop approach enhances PSR while maintaining voltage headroom. A dynamic response technique combined with power gating improves load-transient performance without increasing the quiescent current. The capacitor-less LDO operates from a 2.5 V supply while regulating the output to 2.2 V, demonstrating a room-temperature quiescent current of 370 nA and supporting a maximum load current of 50 mA. Post layout simulations show worst-case PSR of-101 dB at 1 Hz and-47.8 dB at 1 kHz across the specified load range, with a transient figure-of-merit (FoM1) of 0.219 mV.
Keyword ：
Dynamic response technique Dynamic response technique LDO-BGR system LDO-BGR system PSR PSR Shared feedback loop BGR (SF-BGR) Shared feedback loop BGR (SF-BGR)
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| GB/T 7714 | Xie, Jin , Chen, Qibin , Li, Jinghu et al. A 370-nA capacitor-less LDO-BGR system for PSR enhancement via shared feedback loops [J]. | MICROELECTRONICS JOURNAL , 2026 , 167 . |
| MLA | Xie, Jin et al. "A 370-nA capacitor-less LDO-BGR system for PSR enhancement via shared feedback loops" . | MICROELECTRONICS JOURNAL 167 (2026) . |
| APA | Xie, Jin , Chen, Qibin , Li, Jinghu , Pan, Xingxing , Luo, Zhicong , Zhang, Jianwei . A 370-nA capacitor-less LDO-BGR system for PSR enhancement via shared feedback loops . | MICROELECTRONICS JOURNAL , 2026 , 167 . |
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A low-area and low-temperature-coefficient (TC) bandgap reference (BGR) circuit using curvature compensation technology is presented. Comparing with traditional BGR with multiple BJT, four MOSFETs biased in their weak-inversion regions can produce a proportionalto-absolute-temperature (PTAT) voltage without consuming a great active area. In addition, a curvature compensation circuit was adopted to reduce the drift of temperature. The proposed BGR circuit has been implemented using a 0.18um technology, occupying an area of 0.01 mm2.Simulation results demonstrate that the BGR achieves average TC of 7.86ppm/degrees C from -40 degrees C to 125 degrees C at 3.3 V and the line regulation (LR) of 0.048%/V between 2.7 and 3.6 V supply voltage, respectively.
Keyword ：
and bandgap reference voltage and bandgap reference voltage curvature compensation curvature compensation low-area low-area Sub-threshold Sub-threshold
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| GB/T 7714 | Yan, Zhenjie , Zhang, Binhan , Yang, Rui et al. A 1.2-V compact Bandgap Reference with Curvature Compensation technology [J]. | IEICE ELECTRONICS EXPRESS , 2025 , 22 (7) . |
| MLA | Yan, Zhenjie et al. "A 1.2-V compact Bandgap Reference with Curvature Compensation technology" . | IEICE ELECTRONICS EXPRESS 22 . 7 (2025) . |
| APA | Yan, Zhenjie , Zhang, Binhan , Yang, Rui , Zheng, Yi , Li, Jinghu , Luo, Zhicong et al. A 1.2-V compact Bandgap Reference with Curvature Compensation technology . | IEICE ELECTRONICS EXPRESS , 2025 , 22 (7) . |
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Abstract ：
本发明涉及显示控制技术领域，具体为显示器自监控方法、系统以及显示器，包括以下步骤：收集光强度数据与预设标准对比分类环境光为低光、强光或反射光，判断实时色温与标准色温差值是否超阈值，超出则调整色温与亮度，逐帧提取像素RGB通道比例并生成色域分布图，记录修复指令时间特征并统计色温调整趋势，生成背光梯度补偿模式。本发明中，通过实时监测显示器周围的光强度，并与预设的光照条件进行对比，自动分类环境光情况，使得显示器能够针对不同光照环境调整色温和亮度，通过逐帧分析显示帧中红、绿、蓝三通道的覆盖面积，及时调整显示器的背光驱动，提高显示器在变化光照条件下的适应能力和长期稳定性，为用户提供更加优化的视觉体验。
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| GB/T 7714 | 陈杰睿 , 修新田 , 罗志聪 . 显示器自监控方法、系统以及显示器 : CN202510611929.6[P]. | 2025-05-13 . |
| MLA | 陈杰睿 et al. "显示器自监控方法、系统以及显示器" : CN202510611929.6. | 2025-05-13 . |
| APA | 陈杰睿 , 修新田 , 罗志聪 . 显示器自监控方法、系统以及显示器 : CN202510611929.6. | 2025-05-13 . |
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Abstract ：
This paper presents an adjustable CMOS voltage reference that achieves a low temperature coefficient (TC) through a novel curvaturecompensation technique. The design employs thin/thick-gate NMOS and PMOS pairs to generate complementary voltages (Delta VGs and Delta VsG) with opposing second-order curvature. Dynamically scaling Delta VGs via a programmable k-coefficient and summing with Delta VsG enables output adjustability and low TC. Implemented in 180 nm CMOS, post-layout simulations show 0.5-0.95 V output range with average TC of 5 ppm/degrees C (best) to 15 ppm/degrees C (worst) from-40 degrees C to 125 degrees C. The circuit consumes 456.5 nA at 27 degrees C and achieves-51 dB PSRR (@100 Hz).
Keyword ：
CMOS voltage reference CMOS voltage reference curvature compensation curvature compensation low temperature coefficient low temperature coefficient Sub-threshold Sub-threshold
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| GB/T 7714 | He, Lili , Zhong, Chengjian , Qiu, Hangfang et al. A Novel Curvature-Compensated Adjustable Output CMOS Voltage Reference [J]. | IEICE ELECTRONICS EXPRESS , 2025 , 22 (18) . |
| MLA | He, Lili et al. "A Novel Curvature-Compensated Adjustable Output CMOS Voltage Reference" . | IEICE ELECTRONICS EXPRESS 22 . 18 (2025) . |
| APA | He, Lili , Zhong, Chengjian , Qiu, Hangfang , Zheng, Baiqi , Li, Jinghu , Luo, Zhicong . A Novel Curvature-Compensated Adjustable Output CMOS Voltage Reference . | IEICE ELECTRONICS EXPRESS , 2025 , 22 (18) . |
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Abstract ：
This paper presents a low-power low-dropout regulator integrated with a bandgap reference (LDO-BGR) system that achieves exceptional low-frequency power-supply rejection (PSR). The proposed architecture employs three novel feedback loops, enabling functional reuse of a single error amplifier for both the shared-feedback-loop BGR (SF-BGR) and the LDO. This shared-loop approach enhances PSR while maintaining voltage headroom. A dynamic response technique combined with power gating improves load-transient performance without increasing the quiescent current. The capacitor-less LDO operates from a 2.5~V supply while regulating the output to 2.2~V, demonstrating a room-temperature quiescent current of 370~nA and supporting a maximum load current of 50~mA. Measurements show worst-case PSR of $-101$~dB at 1~Hz and $-48$~dB at 1~kHz across the specified load range, with a transient figure-of-merit (FoM) of 0.219~mV. © 2025, The Authors. All rights reserved.
Keyword ：
Dynamic response Dynamic response Dynamics Dynamics Feedback Feedback Power quality Power quality Transients Transients Voltage regulators Voltage regulators
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| GB/T 7714 | Xie, Jin , Chen, Qibin , Li, Jinghu et al. A 370‑nA Capacitor-less LDO–BGR System for PSR Enhancement via Shared Feedback Loops [J]. | SSRN , 2025 . |
| MLA | Xie, Jin et al. "A 370‑nA Capacitor-less LDO–BGR System for PSR Enhancement via Shared Feedback Loops" . | SSRN (2025) . |
| APA | Xie, Jin , Chen, Qibin , Li, Jinghu , Pan, Xingxing , Luo, Zhicong , Zhang, Jianwei . A 370‑nA Capacitor-less LDO–BGR System for PSR Enhancement via Shared Feedback Loops . | SSRN , 2025 . |
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This paper presents a high precision bandgap voltage reference based on chopping technique, with an output voltage of 1.2 V. To reduce the temperature coefficient (TC), a temperature piecewise compensation circuit is introduced into the traditional bandgap reference circuit, achieving a minimum TC of 0.855 ppm/degrees C over a temperature range of-40 degrees C to 125 degrees C. The chopping technique significantly reduces output noise, resulting in a 1/f noise of 6.11 mu Vrms from 0.1 Hz to 10 Hz. Additionally, a digital trimming technology is employed to address TC deviations caused by process corners and mismatches. Simulation results indicate that the output voltage remains within a +/- 0.085% inaccuracy in 3. The quiescent current is 42 mu A, the power supply rejection ratio (PSRR) reaches 83 dB at 100 Hz, and the line regulation(LR) is 81 mu V/V, with a layout area of 0.02 mm2. This design enhances the precision of the voltage reference while maintaining low TC and low noise characteristics, making it suitable for high-demand analog circuit applications.
Keyword ：
High precision High precision Low noise Low noise Low temperature coefficient Low temperature coefficient Voltage reference Voltage reference
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| GB/T 7714 | Lin, Quanxin , Ye, Dapeng , Chao, Jianshu et al. A 1.2-V 0.855-ppm/°C6.11μVrms noise and high precision bandgap reference based on chopping technique [J]. | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS , 2025 , 200 . |
| MLA | Lin, Quanxin et al. "A 1.2-V 0.855-ppm/°C6.11μVrms noise and high precision bandgap reference based on chopping technique" . | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS 200 (2025) . |
| APA | Lin, Quanxin , Ye, Dapeng , Chao, Jianshu , Li, Jinghu , Luo, Zhicong . A 1.2-V 0.855-ppm/°C6.11μVrms noise and high precision bandgap reference based on chopping technique . | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS , 2025 , 200 . |
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In this paper, we present a novel enhanced recycling folded cascode (ERFC) operational transconductance amplifier (OTA), which exhibits high efficiency and a fast transient response under weak inversion. Our innovative combination of adaptive biasing with nested local feedback (ABNLF) effectively enhances the input transconductance and slew rate (SR), thus improving the transient response. By incorporating coupling capacitors at the output stage, we achieve a stable operating region with large signal responses. Both the traditional RFC OTA and the proposed ERFC OTA were designed in a 0.18 mu m CMOS process, operating at a power supply of 1.8 V, with quiescent currents of 8 mu A and 10.4 mu A, respectively. Post-layout simulations reveal a remarkable enhancement in the proposed ERFC OTA over the traditional RFC OTA, with the SR and gain-bandwidth (GBW) surging by 120- and 5.95-fold, respectively. This advancement boosts the efficiency of the traditional RFC OTA and provides an impressive figure of merit (FoM) of 130.04 (V/mu s)pF/mu A.
Keyword ：
adaptive biasing adaptive biasing enhanced recycling folded cascode (ERFC) enhanced recycling folded cascode (ERFC) high efficiency high efficiency nested local feedback technique nested local feedback technique transient response transient response
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| GB/T 7714 | Wu, Chunkai , Cai, Peng , Li, Jinghu et al. Power-Efficient Recycling Folded Cascode Operational Transconductance Amplifier Based on Nested Local Feedback and Adaptive Biasing [J]. | SENSORS , 2025 , 25 (8) . |
| MLA | Wu, Chunkai et al. "Power-Efficient Recycling Folded Cascode Operational Transconductance Amplifier Based on Nested Local Feedback and Adaptive Biasing" . | SENSORS 25 . 8 (2025) . |
| APA | Wu, Chunkai , Cai, Peng , Li, Jinghu , Xie, Jin , Luo, Zhicong . Power-Efficient Recycling Folded Cascode Operational Transconductance Amplifier Based on Nested Local Feedback and Adaptive Biasing . | SENSORS , 2025 , 25 (8) . |
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This paper presents a CMOS voltage reference circuit designed to achieve high power supply rejection ratio (PSRR) across a wide frequency range while maintaining a low temperature coefficient (TC). The circuit uses voltage self-regulating technology to mitigate the impact of power supply ripple on the output voltage. Additionally, a compact MOSFET-based low-pass filter is integrated into the output stage to further enhance high-frequency PSRR performance. The temperature coefficient (TC) of the reference voltage is optimized using an improved design of stacked diode-connected MOS transistors (SDMTs) with different current biasing. The circuit was designed using a 65-nm process. Post-simulation results indicate that the reference voltage output is 415 mV, with an average TC of 10.42 ppm/degrees C across a temperature range of-40 degrees C to 125 degrees C. Within the supply voltage range of 0.8-1.32 V, the line sensitivity (LS) of the reference voltage is about 0.104 mV/V. It is worth highlighting that the PSRR reaches-128.95 dB at 10 kHz and maintains-63.05 dB at 50 MHz.
Keyword ：
CMOS voltage reference CMOS voltage reference Filter Filter High PSRR High PSRR Low temperature coefficient Low temperature coefficient Subthreshold Subthreshold
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| GB/T 7714 | Zheng, Baiqi , Chen, Qibin , Qiu, Hangfang et al. A 10.42 ppm/°C CMOS voltage reference with high PSRR [J]. | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS , 2025 , 198 . |
| MLA | Zheng, Baiqi et al. "A 10.42 ppm/°C CMOS voltage reference with high PSRR" . | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS 198 (2025) . |
| APA | Zheng, Baiqi , Chen, Qibin , Qiu, Hangfang , He, Lili , Li, Jinghu , Luo, Zhicong . A 10.42 ppm/°C CMOS voltage reference with high PSRR . | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS , 2025 , 198 . |
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Precision operational amplifiers (op-amps) adopt dynamic offset compensation (DOC) techniques to achieve microvolt-level offset and nanovolt-level noise. However, the switches in DOC introduce charge injection, which is a major source of current noise and residual offset. Charge-injection-induced glitches need to be attenuated via low-pass filtering, which decreases the usable signal bandwidth. This article proposes a six- channel precision op-amp with multiphase switch reuse, designed and simulated in a 0.18 mu m CMOS process with a 1.032 mm2 active area. Compared with the traditional ping-pong architecture, the six-channel op- amp effectively reduces the required switch width, thereby decreasing the amount of charge injection. The multiphase switch reuse technique reduces the frequency of charge injection per channel and shifts the noise spikes generated by the switches to higher frequencies. Therefore, the proposed circuit allows the cutoff frequency of the post-low-pass filter to be increased, effectively removing the limitations on the overall system's signal transmission bandwidth i mposed by the front-end amplifier. These techniques results in an root input-referred noise density of 8 nV/ Hz, an input offset voltage of 2.46 mu V, an offset drift of 24.65 nV/degrees C, and a gain-bandwidth product of 5.3 MHz.
Keyword ：
Auto-zeroing Auto-zeroing Charge injection Charge injection Chopper Chopper Dynamic offset compensation (DOC) Dynamic offset compensation (DOC) Glitch reduction Glitch reduction Multiphase switch reuse Multiphase switch reuse
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| GB/T 7714 | Dai, Haiyan , Xu, Chengye , Ye, Dapeng et al. Low-noise, zero-drift six-channel precision operational amplifier with multiphase switch reuse [J]. | MICROELECTRONICS JOURNAL , 2025 , 156 . |
| MLA | Dai, Haiyan et al. "Low-noise, zero-drift six-channel precision operational amplifier with multiphase switch reuse" . | MICROELECTRONICS JOURNAL 156 (2025) . |
| APA | Dai, Haiyan , Xu, Chengye , Ye, Dapeng , Luo, Zhicong , Li, Jinghu . Low-noise, zero-drift six-channel precision operational amplifier with multiphase switch reuse . | MICROELECTRONICS JOURNAL , 2025 , 156 . |
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A cross-connected NPN bandgap reference (BGR) circuit with high power supply rejection ratio (PSRR) and low temperature coefficient (TC) is proposed by using curvature-compensated and pre-regulation techniques. Compared with the traditional BGR, it does not require an operational amplifier to clamp the voltage, but uses the voltage feedback of the cross-connected NPN to clamp the voltage, making the structure simpler and eliminating the need to design an operational amplifier. Additionally, by subtracting two nearly identical positive-temperature-coefficient currents, the circuit generates a new current with enhanced curvature, which is then used as a compensating current to reduce the overall temperature coefficient. This compensating current is subsequently scaled by different gain factors to accommodate process-corner variations and serve as a trimming current. Meanwhile, the pre-regulation circuit is respectively adopted to improve PSRR. The proposed BGR circuit is implemented in a 180-nm process, boasting a minimal active area of 0.016 mm2. Simulation results show that the BGR has a best TC of 4.13 ppm/degrees C from-40 degrees C to 125 degrees C at 3.3 V, a PSRR of-122 dB at low frequencies, and a linear regulation (LR) of 0.0027 mV/V within the supply voltage range of 3.0 V to 3.6 V.
Keyword ：
Bandgap reference voltage Bandgap reference voltage Cross-connected NPN Cross-connected NPN Curvature-compensated Curvature-compensated Pre-regulation Pre-regulation
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| GB/T 7714 | Zheng, Yi , Yan, Zhenjie , Yang, Rui et al. A-122 dB PSRR curvature-compensated bandgap reference with cross-connected NPN [J]. | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS , 2025 , 202 . |
| MLA | Zheng, Yi et al. "A-122 dB PSRR curvature-compensated bandgap reference with cross-connected NPN" . | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS 202 (2025) . |
| APA | Zheng, Yi , Yan, Zhenjie , Yang, Rui , Zhang, Binhan , Luo, Zhicong , Li, Jinghu . A-122 dB PSRR curvature-compensated bandgap reference with cross-connected NPN . | AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS , 2025 , 202 . |
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